Recipient: Stefano Bianchi
    Paper:Energy-Efficient Continual Learning in Hybrid Supervised-Unsupervised
    Neural Networks with PCM Synapses
    Authors:  S. Bianchi*, I. Muñoz-Martin*, G. Pedretti*, O. Melnic*, S. Ambrogio** and D. Ielmini*
    Affiliation: *Politecnico di Milano, Italy and **IBM Research, USA


    Recipient: Naga Sruti Avasarala
    Paper: Half-bias Ioff reduction down to nA range of thermally and electrically stable high-performance integrated OTS selector, obtained by Se enrichment and N-doping of thin GeSe layers
    Authors: N. Avasarala, G.L. Donadio, T. Witters, K. Opsomer, B. Govoreanu, A. Fantini, S. Clima, H. Oh, S. Kundu, W. Devulder, M.H. van der Veen, J. Van Houdt, M. Heyns, L. Goux, G. S.
    Affiliation: Kar imec & KU Leuven


    Recipient: Laurent Brunet
    Paper: New Insight on VT stability of HK/MG stacks with scaling in 30nm FDSOI technology
    Authors: Laurent. Brunet*+, X. Garros, M. Cassé, O. Weber, F. Andrieu, C. Fenouillet-Béranger, P. Perreau, F. Martin, M. Charbonnier, D. Lafond, C. Gaumer*, S. Lhostis*, V. Vidal, L. Brévard, L. Tosti, S. Denorme*, S. Barnola, J.F. Damlencourt, V. Loup, G. Reimbold, F. Boulanger, O. Faynot, A. Bravaix
    Affiliation: 1CEA-LETI, * STMicroelectronics, +IM2NP


    Recipient: Gregory Bidal
    Paper: High velocity Si-nanodot: a candidate for SRAM applications at 16nm node and below
    Authors: Gregory Bidal1,2, Frederic Boeuf1, Stephane Denorme1, Nicolas Loubet1, Jean Luc Huguenin1,2, Pierre Perreau3, Dominique Fleury1,2, François Leverd1, Sebastien Lagrasta1, Sebastien Barnola3, Thierry Salvetat3, Bastien Orlando1, Remi Beneyton1, Laurent Clement1, Roland Pantel1, Stephane Monfray1, Gerard Ghibaudo2 and Thomas Skotnicki1
    Affiliation: 1STMicroelectronics, 2IMEP, Minatec INPG, 3CEA-LETI/Minatec


    Recipient: Mohan V. Dunga
    Paper: BSIM-MG: A Versatile Multi-Gate FET Model for Mixed-Signal Design
    Authors: Mohan V. Dunga1, Chung-Hsun Lin1, Darsen D. Lu1, Weize Xiong2, C. R. Cleavelin2, P. Patruno3, Jiunn-Ren Hwang4, Fu-Liang Yang4, Ali M. Niknejad1 and Chenming Hu1
    Affiliation: 1University of California, Berkeley, 2Texas Instruments Inc., 3SOITECH, 4Taiwan Semiconductor Manufacturing Company (TSMC)


    Recipient: Hyunjin Lee
    Paper: Sub-5nm All-Around Gate FinFET for Ultimate Scaling
    Authors: Hyunjin Lee, Lee-Eun Yu, Seong-Wan Ryu, Jin-Woo Han, Kanghoon Jeon, Dong-Yoon Jang, Kuk-Hwan Kim, Jiye Lee, Ju-Hyun Kim, Sang Cheol Jeon*, Gi Seong Lee*, Jae Sub Oh*, Yun Chang Park*, Woo Ho Bae*, Hee Mok Lee*, Jun Mo Yang*, Jung Jae Yoo*, Sang Ik Kim* and Yang-Kyu Choi
    Affiliation: Korea Advanced Institute of Science and Technology, *Korean National Nanofab Center